Запускаем scmRTOS для Cortex-M3 в среде KEIL uVision4

#ifndef _INTRINSICS_H_
#define _INTRINSICS_H_

#ifdef __cplusplus
 extern "C" {
#endif

static ASM INLINE status_reg_t __get_interrupt_state(void)
{
    mrs r0, primask
    bx lr
}

static ASM INLINE void __set_interrupt_state(status_reg_t StatusReg)
{
    msr primask, r0
    bx lr
}

//
// Keil specific intrinsics.
//

#define __enable_interrupt() __enable_irq()
#define __disable_interrupt() __disable_irq()
#define __CLZ(x) __clz(x)

#ifdef __cplusplus
 }
#endif
#endif // _INTRINSICS_H_

#ifndef ASM
#define ASM __asm
#endif

//
//    Compiler specific attributes
//
//
#ifndef INLINE
#define INLINE __inline
#endif

#ifndef NORETURN
#define NORETURN __declspec(noreturn)
#endif

#ifndef ASM
#define ASM __asm
#endif

...

//
//    Configuration macros
//
//
#define OS_PROCESS   
#define OS_INTERRUPT extern "C"
#define DUMMY_INSTR() __nop()
#define INLINE_PROCESS_CTOR

LDR     R2, =(NVIC_ST_CTRL_CLK_SRC :OR: NVIC_ST_CTRL_INTEN :OR: NVIC_ST_CTRL_ENABLE)

SYSTICKFREQ EQU 8000000
SYSTICKINTRATE EQU 500

AREA    |.text|, CODE, READONLY
os_start	PROC
		EXPORT  os_start             [WEAK]
		LDR     R1, =NVIC_SYSPRI14      ; Set the PendSV exception priority (lowest)
		LDR     R2, =NVIC_PENDSV_PRI
		STRB    R2, [R1]
		LDR     R1, =NVIC_SYSPRI15      ; Set the SysTick exception priority (lowest)
		LDR     R2, =NVIC_ST_PRI
		STRB    R2, [R1]
		
		LDR     R1, =NVIC_ST_RELOAD     ; Setup SysTick
		LDR     R2, =(SYSTICKFREQ/SYSTICKINTRATE-1)  
		STR     R2, [R1]
		LDR     R1, =NVIC_ST_CTRL       ; Enable and run SysTick
		LDR     R2, =(NVIC_ST_CTRL_CLK_SRC :OR: NVIC_ST_CTRL_INTEN :OR: NVIC_ST_CTRL_ENABLE)
		STR     R2, [R1]
		
		LDR     R3, [R0, #(4 * 14)]		; Load process entry point into R3
		ADD     R0, R0, #(4 * 16)       ; emulate context restore
		MSR     PSP, R0                 ; store process SP to PSP
		MOV     R0, #2                  ; Switch thread mode stack to PSP
		MSR     CONTROL, R0
		ISB                             ; Insert a barrier

		CPSIE   I                       ; Enable interrupts at processor level

		BX      R3                      ; Jump to process exec() function
		ENDP
		ALIGN

PendSV_Handler  PROC
                EXPORT  PendSV_Handler             [WEAK]
		IMPORT  os_context_switch_hook
		CPSID   I                 ; Prevent interruption during context switch
		MRS     R0, PSP           ; PSP is process stack pointer
		STMDB R0!, {R4-R11}       ; Save remaining regs r4-11 on process stack
		
		; At this point, entire context of process has been saved                                                            
		PUSH    {LR}                           ; Save LR exc_return value
		LDR     R1, =os_context_switch_hook    ; os_context_switch_hook();
		BLX     R1
		
		; R0 is new process SP;
		LDMIA R0!, {R4-R11}       ; Restore r4-11 from new process stack
		MSR     PSP, R0           ; Load PSP with new process SP
		CPSIE   I
		POP     {PC}              ; Return to saved exc_return. Exception return will restore remaining context
                ENDP

int main()
{
    OS::run();
}